Datasheet
82
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
PCMSK0 – Pin Change Mask
Register 0
• Bit 7:0 – PCINT7:0: Pin Change Enable Mask 7:0
Each PCINT7:0 bit selects whether pin change interrupt is enabled on the correspond-
ing I/O pin. If PCINT7:0 is set and the PCIE0 bit in PCICR is set, pin change interrupt is
enabled on the corresponding I/O pin. If PCINT7:0 is cleared, pin change interrupt on
the corresponding I/O pin is disabled.
Bit 76543210
(0x6B) PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 PCMSK0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0