Datasheet

59
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
Figure 25. MCU Start-up, RESET Tied to V
CC
Figure 26. MCU Start-up, RESET Extended Externally
External Reset An External Reset is generated by a low level on the RESET
pin. Reset pulses longer
than the minimum pulse width (see Table 26) will generate a reset, even if the clock is
not running. Shorter pulses are not guaranteed to generate a reset. When the applied
signal reaches the Reset Threshold Voltage – V
RST
– on its positive edge, the delay
counter starts the MCU after the Time-out period – t
TOUT
– has expired.
Figure 27. External Reset During Operation
V
RESET
TIME-OUT
INTERNAL
RESET
t
TOUT
V
POT
V
RST
CC
RESET
TIME-OUT
INTERNAL
RESET
t
TOUT
V
POT
V
RST
V
CC
CC