Datasheet
56
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
PRR1 – Power Reduction
Register 1
• Bit 7:6 - Res: Reserved bits
These bits are reserved and will always read as zero.
• Bit 5 - PRTIM5: Power Reduction Timer/Counter5
Writing a logic one to this bit shuts down the Timer/Counter5 module. When the
Timer/Counter5 is enabled, operation will continue like before the shutdown.
• Bit 4 - PRTIM4: Power Reduction Timer/Counter4
Writing a logic one to this bit shuts down the Timer/Counter4 module. When the
Timer/Counter4 is enabled, operation will continue like before the shutdown.
• Bit 3 - PRTIM3: Power Reduction Timer/Counter3
Writing a logic one to this bit shuts down the Timer/Counter3 module. When the
Timer/Counter3 is enabled, operation will continue like before the shutdown.
• Bit 2 - PRUSART3: Power Reduction USART3
Writing a logic one to this bit shuts down the USART3 by stopping the clock to the mod-
ule. When waking up the USART3 again, the USART3 should be re initialized to ensure
proper operation.
• Bit 1 - PRUSART2: Power Reduction USART2
Writing a logic one to this bit shuts down the USART2 by stopping the clock to the mod-
ule. When waking up the USART2 again, the USART2 should be re initialized to ensure
proper operation.
• Bit 0 - PRUSART1: Power Reduction USART1
Writing a logic one to this bit shuts down the USART1 by stopping the clock to the mod-
ule. When waking up the USART1 again, the USART1 should be re initialized to ensure
proper operation.
Bit 76543 2 1 0
(0x65) – – PRTIM5 PRTIM4 PRTIM3 PRUSART3 PRUSART2 PRUSART1 PRR1
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0