Datasheet

50
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
Power Management
and Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR provides various sleep modes allowing the user to tailor the
power consumption to the application’s requirements.
Sleep Modes Figure 20 on page 37 presents the different clock systems in the
ATmega640/1280/1281/2560/2561, and their distribution. The figure is helpful in select-
ing an appropriate sleep mode. Table 24 shows the different sleep modes and their
wake-up sources.
Notes: 1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT7:4, only level interrupt.
To enter any of the sleep modes, the SE bit in “SMCR – Sleep Mode Control Register”
on page 54 must be written to logic one and a SLEEP instruction must be executed. The
SM2, SM1, and SM0 bits in the SMCR Register select which sleep mode will be acti-
vated by the SLEEP instruction. See Table 25 on page 54 for a summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up.
The MCU is then halted for four cycles in addition to the start-up time, executes the
interrupt routine, and resumes execution from the instruction following SLEEP. The con-
tents of the Register File and SRAM are unaltered when the device wakes up from
sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the
Reset Vector.
Table 24. Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains Oscillators Wake-up Sources
Sleep Mode
clk
CPU
clk
FLASH
clk
IO
clk
ADC
clk
ASY
Main Clock Source Enabled Timer Osc Enabled INT7:0 and Pin Change TWI Address Match Timer2 SPM/ EEPROM Ready ADC WDT Interrupt Other I/O
Idle X X X X X
(2)
XXXXXXX
ADCNRM X X X X
(2)
X
(3)
XX
(2)
XXX
Power-down X
(3)
XX
Power-save X X
(2)
X
(3)
XX X
Standby
(1)
XX
(3)
XX
Extended Standby X
(2)
XX
(2)
X
(3)
XX X