Datasheet

5
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
Overview
The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATmega640/1280/1281/2560/2561 achieves
throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing
speed.
Block Diagram
Figure 4. Block Diagram
CPU
GND
VCC
RESET
Power
Supervision
POR / BOD &
RESET
Watchdog
Oscillator
Watchdog
Timer
Oscillator
Circuits /
Clock
Generation
XTAL1
XTAL2
PC7..0 PORT C (8)
PA7..0
PORT A (8)
PORT D (8)
PD7..0
PORT B (8)
PB7..0
PORT E (8)
PE7..0
PORT F (8)
PF7..0
PORT J (8)
PJ7..0
PG5..0 PORT G (6)
PORT H (8)
PH7..0
PORT K (8)
PK7..0
PORT L (8)
PL7..0
XRAM
TWI SPI
EEPROM
JTAG
8bit T/C 0 8bit T/C 2
16bit T/C 1
16bit T/C 3
SRAMFLASH
16bit T/C 4
16bit T/C 5
USART 2
USART 1
USART 0
Internal
Bandgap reference
Analog
Comparator
A/D
Converter
USART 3
NOTE:
Shaded parts only available
in the 100-pin version.
Complete functionality for
the ADC, T/C4, and T/C5 only
available in the 100-pin version.