Datasheet

ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

Clock Systems and their

Distribution

CPU Clock – clk

CPU

The CPU clock is routed to parts of the system concerned with operation of the AVR

core. Examples of such modules are the General Purpose Register File, the Status Reg-

ister and the data memory holding the Stack Pointer. Halting the CPU clock inhibits the

core from performing general operations and calculations.

I/O Clock – clk

I/O

The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and

USART. The I/O clock is also used by the External Interrupt module, but note that some

external interrupts are detected by asynchronous logic, allowing such interrupts to be

detected even if the I/O clock is halted. Also note that start condition detection in the USI

module is carried out asynchronously when clk

I/O

is halted, TWI address recognition in

all sleep modes.

Flash Clock – clk

FLASH

The Flash clock controls operation of the Flash interface. The Flash clock is usually

active simultaneously with the CPU clock.

Asynchronous Timer Clock –

clk

ASY

The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked

directly from an external clock or an external 32 kHz clock crystal. The dedicated clock

domain allows using this Timer/Counter as a real-time counter even when the device is

in sleep mode.

ADC Clock – clk

ADC

The ADC is provided with a dedicated clock domain. This allows halting the CPU and

I/O clocks in order to reduce noise generated by digital circuitry. This gives more accu-

rate ADC conversion results.