Datasheet

342
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
Memory
Programming
Program And Data
Memory Lock Bits
The ATmega640/1280/1281/2560/2561 provides six Lock bits which can be left unpro-
grammed (“1”) or can be programmed (“0”) to obtain the additional features listed in
Table 150. The Lock bits can only be erased to “1” with the Chip Erase command.
Note: 1. “1” means unprogrammed, “0” means programmed
Table 149. Lock Bit Byte
(1)
Lock Bit Byte Bit No Description Default Value
7 – 1 (unprogrammed)
6 – 1 (unprogrammed)
BLB12 5 Boot Lock bit 1 (unprogrammed)
BLB11 4 Boot Lock bit 1 (unprogrammed)
BLB02 3 Boot Lock bit 1 (unprogrammed)
BLB01 2 Boot Lock bit 1 (unprogrammed)
LB2 1 Lock bit 1 (unprogrammed)
LB1 0 Lock bit 1 (unprogrammed)
Table 150. Lock Bit Protection Modes
(1)(2)
Memory Lock Bits Protection Type
LB Mode LB2 LB1
111No memory lock features enabled.
210
Further programming of the Flash and EEPROM is
disabled in Parallel and Serial Programming mode. The
Fuse bits are locked in both Serial and Parallel
Programming mode.
(1)
300
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and Serial Programming
mode. The Boot Lock bits and Fuse bits are locked in both
Serial and Parallel Programming mode.
(1)
BLB0 Mode BLB02 BLB01
111
No restrictions for SPM or (E)LPM accessing the
Application section.
2 1 0 SPM is not allowed to write to the Application section.
300
SPM is not allowed to write to the Application section, and
(E)LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
401
(E)LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.