Datasheet

ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

EEPROM registers

EEARH and EEARL – The

EEPROM Address Register

• Bits 15:12 – Res: Reserved Bits

These bits are reserved bits and will always read as zero.

• Bits 11:0 – EEAR8:0: EEPROM Address

The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address

in the 4K bytes EEPROM space. The EEPROM data bytes are addressed linearly

between 0 and 4096. The initial value of EEAR is undefined. A proper value must be

written before the EEPROM may be accessed.

EEDR – The EEPROM Data

• Bits 7:0 – EEDR7:0: EEPROM Data

For the EEPROM write operation, the EEDR Register contains the data to be written to

the EEPROM in the address given by the EEAR Register. For the EEPROM read oper-

ation, the EEDR contains the data read out from the EEPROM at the address given by

EEAR.

EECR – The EEPROM Control

• Bits 7:6 – Res: Reserved Bits

These bits are reserved bits and will always read as zero.

• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits

The EEPROM Programming mode bit setting defines which programming action that will

be triggered when writing EEPE. It is possible to program data in one atomic operation

(erase the old value and program the new value) or to split the Erase and Write opera-

tions in two different operations. The Programming times for the different modes are

shown in Table 6. While EEPE is set, any write to EEPMn will be ignored. During reset,

the EEPMn bits will be reset to 0b00 unless the EEPROM is busy programming.

Bit 1514131211 10 9 8

0x22 (0x42) ––––EEAR11EEAR10EEAR9EEAR8EEARH

0x21 (0x41) EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL

7654 3 2 10

Read/WriteRRRRR/W R/W R/W R/W

R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value0000X XXX

XXXX X X XX

Bit 76543210

0x20 (0x40) MSB LSB EEDR

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value00000000

Bit 76543210

0x1F (0x3F) – – EEPM1 EEPM0 EERIE EEMPE EEPE EERE EECR

Read/Write R R R/W R/W R/W R/W R/W R/W

Initial Value 0 0 X X 0 0 X 0