Datasheet
314
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
Boundary-scan Related
Register in I/O Memory
MCUCR – MCU Control
Register
The MCU Control Register contains control bits for general MCU functions.
• Bits 7 – JTD: JTAG Interface Disable
When this bit is zero, the JTAG interface is enabled if the JTAGEN Fuse is programmed.
If this bit is one, the JTAG interface is disabled. In order to avoid unintentional disabling
or enabling of the JTAG interface, a timed sequence must be followed when changing
this bit: The application software must write this bit to the desired value twice within four
cycles to change its value. Note that this bit must not be altered when using the On-chip
Debug system.
MCUSR – MCU Status
Register
The MCU Status Register provides information on which reset source caused an MCU
reset.
• Bit 4 – JTRF: JTAG Reset Flag
This bit is set if a reset is being caused by a logic one in the JTAG Reset Register
selected by the JTAG instruction AVR_RESET. This bit is reset by a Power-on Reset, or
by writing a logic zero to the flag.
Bit 76543210
0x35 (0x55) JTD
– – PUD – – IVSEL IVCE MCUCR
Read/Write R/W RRR/W RRR/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x34 (0x54)
– – –JTRFWDRF BORF EXTRF PORF MCUSR
Read/Write R R R R/W R/W R/W R/W R/W
Initial Value 0 0 0 See Bit Description