Datasheet

294

ATmega640/1280/1281/2560/2561

2549K–AVR–01/07

ADMUX – ADC Multiplexer

Selection Register

• Bit 7:6 – REFS1:0: Reference Selection Bits

These bits select the voltage reference for the ADC, as shown in Table 128. If these bits

are changed during a conversion, the change will not go in effect until this conversion is

complete (ADIF in ADCSRA is set). The internal voltage reference options may not be

used if an external reference voltage is being applied to the AREF pin.

Note: 1. If 10x or 200x gain is selected, only 2.56 V should be used as Internal Voltage Refer-

ence. For differential conversion, only 1.1V cannot be used as internal voltage

reference.

• Bit 5 – ADLAR: ADC Left Adjust Result

The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data

adjusted. Changing the ADLAR bit will affect the ADC Data Register immediately,

regardless of any ongoing conversions. For a complete description of this bit, see

“ADCL and ADCH – The ADC Data Register” on page 298.

• Bits 4:0 – MUX4:0: Analog Channel and Gain Selection Bits

The value of these bits selects which combination of analog inputs are connected to the

ADC. See Table 129 for details.

If these bits are changed during a conversion, the

change will not go in effect until this conversion is complete (ADIF in ADCSRA is set)

Bit 76543210

(0x7C) REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 ADMUX

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value00000000

Table 128. Voltage Reference Selections for ADC

REFS1 REFS0 Voltage Reference Selection

(1)

0 0 AREF, Internal V

REF

turned off

0 1 AVCC with external capacitor at AREF pin

1 0 Internal 1.1V Voltage Reference with external capacitor at AREF pin

1 1 Internal 2.56V Voltage Reference with external capacitor at AREF pin