Datasheet

284
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
Figure 117. ADC Timing Diagram, Single Conversion
Figure 118. ADC Timing Diagram, Auto Triggered Conversion
Figure 119. ADC Timing Diagram, Free Running Conversion
1
2 3 4 5 6 7 8
9 10 11 12 13
Sign and MSB of Result
LSB of Result
ADC Clock
ADSC
ADIF
ADCH
ADCL
Cycle Number
12
One Conversion Next Conversion
3
Sample & Hold
MUX and REFS
Update
Conversion
Complete
MUX and REFS
Update
1 2 3 4 5 6 7 8
9
10 11 12 13
Sign and MSB of Result
LSB of Result
ADC Clock
Trigger
Source
ADIF
ADCH
ADCL
Cycle Number
12
One Conversion Next Conversion
Conversion
Complete
Prescaler
Reset
ADATE
Prescaler
Reset
Sample &
Hold
MUX and REFS
Update
11 12 13
Sign and MSB of Result
LSB of Result
ADC Clock
ADSC
ADIF
ADCH
ADCL
Cycle Number
12
One Conversion Next Conversion
34
Conversion
Complete
Sample & Hold
MUX and REFS
Update