Datasheet

26
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
External Memory
Interface
With all the features the External Memory Interface provides, it is well suited to operate
as an interface to memory devices such as External SRAM and Flash, and peripherals
such as LCD-display, A/D, and D/A. The main features are:
Four different wait-state settings (including no wait-state).
Independent wait-state setting for different External Memory sectors (configurable sector
size)
The number of bits dedicated to address high byte is selectable
Bus keepers on data lines to minimize current consumption (optional)
Overview W hen the eXternal MEMory (XMEM) is enabled, address space outside the internal
SRAM becomes available using the dedicated External Memory pins (see Figure 3 on
page 4, Table 39 on page 91, Table 45 on page 95, and Table 57 on page 105). The
memory configuration is shown in Figure 13.
Figure 13. External Memory with Sector Select
Using the External Memory
Interface
The interface consists of:
AD7:0: Multiplexed low-order address bus and data bus.
A15:8: High-order address bus (configurable number of bits).
ALE: Address latch enable.
•RD
: Read strobe.
WR
: Write strobe.
The control bits for the External Memory Interface are located in two registers, the Exter-
nal Memory Control Register A – XMCRA, and the External Memory Control Register B
– XMCRB.
When the XMEM interface is enabled, the XMEM interface will override the setting in the
data direction registers that corresponds to the ports dedicated to the XMEM interface.
Memory Configuration A
0x0000
0x21FF
External Memory
(0-60K x 8)
0xFFFF
Internal memory
SRL[2..0]
SRW11
SRW10
SRW01
SRW00
Lower sector
Upper sector
0x2200