Datasheet

237
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
The internal clock generation used in MSPIM mode is identical to the USART synchro-
nous master mode. The baud rate or UBRRn setting can therefore be calculated using
the same equations, see Table 113:
Note: 1. The baud rate is defined to be the transfer rate in bit per second (bps)
BAUD Baud rate (in bits per second, bps)
f
OSC
System Oscillator clock frequency
UBRRnContents of the UBRRnH and UBRRnL Registers, (0-4095)
SPI Data Modes and
Timing
There are four combinations of XCKn (SCK) phase and polarity with respect to serial
data, which are determined by control bits UCPHAn and UCPOLn. The data transfer
timing diagrams are shown in Figure 89. Data bits are shifted out and latched in on
opposite edges of the XCKn signal, ensuring sufficient time for data signals to stabilize.
The UCPOLn and UCPHAn functionality is summarized in Table 114. Note that chang-
ing the setting of any of these bits will corrupt all ongoing communication for both the
Receiver and Transmitter.
Table 113. Equations for Calculating Baud Rate Register Setting
Operating Mode
Equation for Calculating Baud
Rate
(1)
Equation for Calculating
UBRRn Value
Synchronous Master
mode
BAUD
f
OSC
2 UBRRn 1+()
---------------------------------------= UBRRn
f
OSC
2BAUD
-------------------- 1–=
Table 114. UCPOLn and UCPHAn Functionality-
UCPOLn UCPHAn SPI Mode Leading Edge Trailing Edge
0 0 0 Sample (Rising) Setup (Falling)
0 1 1 Setup (Rising) Sample (Falling)
1 0 2 Sample (Falling) Setup (Rising)
1 1 3 Setup (Falling) Sample (Rising)