Datasheet

230
ATmega640/1280/1281/2560/2561
2549K–AVR–01/07
• Bits 5:4 – UPMn1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmit-
ter will automatically generate and send the parity of the transmitted data bits within
each frame. The Receiver will generate a parity value for the incoming data and com-
pare it to the UPMn setting. If a mismatch is detected, the UPEn Flag in UCSRnA will be
set.
• Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver
ignores this setting.
• Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data
bits (Character SiZe) in a frame the Receiver and Transmitter use.
Table 105. UPMn Bits Settings
UPMn1 UPMn0 Parity Mode
0 0 Disabled
01Reserved
1 0 Enabled, Even Parity
1 1 Enabled, Odd Parity
Table 106. USBS Bit Settings
USBSn Stop Bit(s)
01-bit
12-bit
Table 107. UCSZn Bits Settings
UCSZn2 UCSZn1 UCSZn0 Character Size
0005-bit
0016-bit
0107-bit
0118-bit
100Reserved
101Reserved
110Reserved
1119-bit