Datasheet

76
7799D–AVR–11/10
ATmega8U2/16U2/32U2
.Table 12-4 and Table 12-5 relate the alternate functions of Port B to the overriding signals
shown in Figure 12-5 on page 72. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the
MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT..
Table 12-4. Overriding Signals for Alternate Functions in PB7..PB4
Signal
Name
PB7/OC0A/OC1C/
PCINT7 PB6/PCINT6 PB5/PCINT5 PB4/T1/PCINT4
PUOE 0 0 0 0
PUOV 0 0 0 0
DDOE 0 0 0 0
DDOV 0 0 0 0
PVOE OC0A/OC1C ENABLE 0 0 0
PVOV OC0A/OC1C 0 0 0
DIEOE PCINT7 • PCIE0 PCINT6 • PCIE0 PCINT5 • PCIE0 PCINT4 • PCIE0
DIEOV 1 1 1 1
DI PCINT7 INPUT PCINT6 INPUT PCINT5 INPUT
PCINT4 INPUT
T1 INPUT
AIO – – – –
Table 12-5. Overriding Signals for Alternate Functions in PB3..PB0
Signal
Name
PB3/MISO/PCINT3/
PDO
PB2/MOSI/PCINT2/
PDI
PB1/SCK/
PCINT1 PB0/
SS/PCINT0
PUOE SPE • MSTR SPE •
MSTR SPE • MSTR SPE • MSTR
PUOV PORTB3 •
PUD PORTB2 • PUD PORTB1 • PUD PORTB0 • PUD
DDOE SPE • MSTR SPE •
MSTR SPE • MSTR SPE • MSTR
DDOV 0 0 0 0
PVOE SPE •
MSTR SPE • MSTR SPE • MSTR 0
PVOV SPI SLAVE OUTPUT SPI MSTR OUTPUT SCK OUTPUT 0
DIEOE PCINT3 • PCIE0 PCINT2 • PCIE0 PCINT1 • PCIE0 PCINT0 • PCIE0
DIEOV 1 1 1 1
DI
SPI MSTR INPUT
PCINT3 INPUT
SPI SLAVE INPUT
PCINT2 INPUT
SCK INPUT
PCINT1 INPUT
SPI
SS
PCINT0 INPUT
AIO – – – –