Datasheet

61
7799D–AVR–11/10
ATmega8U2/16U2/32U2
1010
Reserved
1011
1100
1101
1110
1111
Table 10-6. Watchdog Timer Prescale Select, DIV = 3 (CLKwdt = CLK128 / 7) (Continued)
WDP3 WDP2 WDP1 WDP0
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
V
CC
= 5.0V
Watchdog
Reset/Interrupt Typical
Time-out at
V
CC
= 5.0V
Table 10-7. Watchdog Timer Prescale Select, DIV = 4 (CLKwdt = CLK128 / 9)
WDP3 WDP2 WDP1 WDP0
Number of WDT Oscillator
Cycles before 1st time-out
(Early warning)
Early warning Typical
Time-out at
V
CC
= 5.0V
Watchdog
Reset/Interrupt Typical
Time-out at
V
CC
= 5.0V
0 0 0 0 2K (2048) cycles 72ms 144 ms
0 0 0 1 4K (4096) cycles 144 ms 288 ms
0 0 1 0 8K (8192) cycles 288 ms 576 ms
0 0 1 1 16K (16384) cycles 576 s 1.15 s
0 1 0 0 32K (32768) cycles 1.1 s 2.3 s
0 1 0 1 64K (65536) cycles 2.3 s 4.6 s
0 1 1 0 128K (131072) cycles 4.6 s 9.2 s
0 1 1 1 256K (262144) cycles 9.2 s 18.4s
1 0 0 0 512K (524288) cycles 18.4 s 36.8 s
1 0 0 1 1024K (1048576) cycles 36.8 s 73 s
1010
Reserved
1011
1100
1101
1110
1111