Datasheet

31
7799D–AVR–11/10
ATmega8U2/16U2/32U2
3. If 8 MHz frequency exceeds the specification of the device (depends on V
CC
), the CKDIV8
Fuse can be programmed in order to divide the internal frequency by 8. It must be ensured
that the resulting divided clock meets the frequency specification of the device.
The CKSEL0 Fuse together with the SUT1..0 Fuses select the start-up times as shown in Table
8-4.
Notes: 1. These options should only be used when not operating close to the maximum frequency of the
device, and only if frequency stability at start-up is not important for the application. These
options are not suitable for crystals.
2. These options are intended for use with ceramic resonators and will ensure frequency stability
at start-up. They can also be used with crystals when not operating close to the maximum fre-
quency of the device, and if frequency stability at start-up is not important for the application.
Note: 1.
The device is shipped with this option selected.
Table 8-4. Start-up Times for the Low Power Crystal Oscillator Clock Selection
Oscillator Source /
Power Conditions
Start-up Time from
Power-down and
Power-save
Additional Delay
from Reset
(V
CC
= 5.0V) CKSEL0 SUT1..0
Ceramic resonator, fast
rising power
258 CK 14CK + 4.1 ms
(1)
000
Ceramic resonator, slowly
rising power
258 CK 14CK + 65 ms
(1)
001
Ceramic resonator, BOD
enabled
1K CK 14CK
(2)
010
Ceramic resonator, fast
rising power
1K CK 14CK + 4.1 ms
(2)
011
Ceramic resonator, slowly
rising power
1K CK 14CK + 65 ms
(2)
100
Crystal Oscillator, BOD
enabled
16K CK 14CK 1 01
Crystal Oscillator, fast
rising power
16K CK 14CK + 4.1 ms 1 10
Crystal Oscillator, slowly
rising power
16K CK 14CK + 65 ms 1 11
Table 8-5. Start-up times for the internal calibrated RC Oscillator clock selection
Power Conditions
Start-up Time from Power-
down and Power-save
Additional Delay from
Reset (V
CC
= 5.0V) SUT1..0
BOD enabled 6 CK 14CK 00
Fast rising power 6 CK 14CK + 4.1 ms 01
Slowly rising power 6 CK 14CK + 65 ms
(1)
10
Reserved 11