Datasheet

267
7799D–AVR–11/10
ATmega8U2/16U2/32U2
26.4.3 External Clock Drive
Note: All DC Characteristics contained in this datasheet are based on simulation and characterization of
other AVR microcontrollers manufactured in the same process technology. These values are pre-
liminary values representing design targets, and will be updated after characterization of actual
silicon.
26.5 System and Reset Characteristics
Note: The POR will not work unless the supply voltage has been below VPOT (falling)
Table 26-2. External Clock Drive
Symbol Parameter
V
CC
=2.7-5.5V V
CC
=4.5-5.5V
UnitsMin. Max. Min. Max.
1/t
CLCL
Oscillator Frequency 0 8 0 16 MHz
t
CLCL
Clock Period 125 62.5 ns
t
CHCX
High Time 50 25 ns
t
CLCX
Low Time 50 25 ns
t
CLCH
Rise Time 1.6 0.5 s
t
CHCL
Fall Time 1.6 0.5 s
t
CLCL
Change in period from
one clock cycle to the
next
22%
Table 26-3. Reset, Brown-out and Internal Voltage Reference Characteristics
Symbol Parameter Condition Min Typ Max Units
V
POT
Power-on Reset Threshold Voltage (rising) 1.4 2.3 V
Power-on Reset Threshold Voltage (falling)
(Note:)
1.3 2.3 V
V
POR
V
CC
Start Voltage to ensure internal Power-on Reset signal -0.1 0.1 V
V
CCRR
V
CC
Rise Rate to ensure internal Power_on Reset signal 0.3 V/ms
t
RST
Minimum pulse width on RESET Pin 5V, 25°C 400 ns
V
HYST
Brown-out Detector Hysteresis 50 mV
t
BOD
Min Pulse Width on Brown-out Reset ns
V
BG
Bandgap reference voltage
V
CC
= 2.7V -
5.5V
1.0 1.1 1.2 V
t
BG
Bandgap reference start-up time - 40 70 μs
I
BG
Bandgap reference current consumption - 10 μA