Datasheet

209
7799D–AVR–11/10
ATmega8U2/16U2/32U2
Figure 21-5. USB Device Controller Endpoint Interrupt System
Processing interrupts are generated when:
• Ready to accept IN data(EPINTx, TXINI=1)
• Received OUT data(EPINTx, RXOUTI=1)
• Received SETUP(EPINTx, RXSTPI=1)
Exception Interrupts are generated when:
• Stalled packet(EPINTx, STALLEDI=1)
• CRC error on OUT in isochronous mode(EPINTx, STALLEDI=1)
• Overflow(EPINTx, OVERFI=1)
• Underflow in isochronous mode(EPINTx, UNDERFI=1)
• NAK IN sent(EPINTx, NAKINI=1)
• NAK OUT sent(EPINTx, NAKOUTI=1)
21.18 Register Description
21.18.1 UDCON – USB Device Control Registers
EPINT
UEINT.X
Endpoint 0
Endpoint 1
Endpoint 2
Endpoint 3
Endpoint 4
Endpoint Interrupt
FLERRE
UEIENX.7
OVERFI
UESTAX.6
UNDERFI
UESTAX.5
NAKINI
UEINTX.6
NAKINE
UEIENX.6
NAKOUTI
UEINTX.4
TXSTPE
UEIENX.4
RXSTPI
UEINTX.3
TXOUTE
UEIENX.3
RXOUTI
UEINTX.2
RXOUTE
UEIENX.2
STALLEDI
UEINTX.1
STALLEDE
UEIENX.1
TXINI
UEINTX.0
TXINE
UEIENX.0
Bit 76543210
(0xE0) - - - - - RSTCPU RMWKUP DETACH UDCON
Read/Write R R R R R R/W R/W R/W
Initial Value 0 0 000001