Datasheet

94
8024A–AVR–04/08
ATmega8HVA/16HVA
18. SPI – Serial Peripheral Interface
18.1 Features
• Full-duplex, Three-wire Synchronous Data Transfer
• Master or Slave Operation
• LSB First or MSB First Data Transfer
• Seven Programmable Bit Rates
• End of Transmission Interrupt Flag
• Write Collision Protection Flag
• Wake-up from Idle Mode
• Double Speed (CK/2) Master SPI Mode
18.2 Overview
The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between the
ATmega8HVA/16HVA and peripheral devices or between several AVR devices.
The PRSPI bit in ”PRR0 – Power Reduction Register 0” on page 39 must be written to zero to
enable SPI module.
Figure 18-1. SPI Block Diagram
(1)
Note: 1. Refer to ”Alternate Port Functions” on page 68 for SPI pin placement.
SPI2X
SPI2X
DIVIDER
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