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ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TSSOP 28 8-Bit 4 MHz I/O number 7
919293949596979899100
91
8024A–AVR–04/08
ATmega8HVA/16HVA
17.10.2 TCNTnL – Timer/Counter n Register Low Byte
The Timer/Counter Register TCNTnL gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNTnL Register blocks (disables) the Com-
pare Match on the following timer clock. Modifying the counter (TCNTnL) while the counter is
running, introduces a risk of missing a Compare Match between TCNTnL and the OCRnx Regis-
ters. In 16-bit mode the TCNTnL register contains the lower part of the 16-bit Timer/Counter n
Register.
17.10.3 TCNTnH – Timer/Counter n Register High Byte
When 16-bit mode is selected (the TCWn bit is set to one) the Timer/Counter Register TCNTnH
combined to the Timer/Counter Register TCNTnL gives direct access, both for read and write
operations, to the Timer/Counter unit 16-bit counter. To ensure that both the high and low bytes
are read and written simultaneously when the CPU accesses these registers, the access is per-
formed using an 8-bit temporary high byte register (TEMP). This temporary register is shared by
all the other 16-bit registers. See ”Accessing Registers in 16-bit Mode” on page 86. In 8-bit
mode, this register is accessable for both reading and writing, but will not be updated by the
counter.
17.10.4 OCRnA – Timer/Counter n Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNTnL). A match can be used to generate an Output Compare interrupt.
In 16-bit mode the OCRnA register contains the low byte of the 16-bit Output Compare Register.
To ensure that both the high and the low bytes are written simultaneously when the CPU writes
to these registers, the access is performed using an 8-bit temporary high byte register (TEMP).
This temporary register is shared by all the other 16-bit registers. See ”Accessing Registers in
16-bit Mode” on page 86.
Note that the OCRnA is not writable in Input Capture mode.
Bit 76543210
TCNTnL[7:0] TCNTnL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
TCNTnH[7:0] TCNTnH
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
OCRnA[7:0] OCRnA
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0