Datasheet

73
8024A–AVR–04/08
ATmega8HVA/16HVA
15.4 Register Description
15.4.1 MCUCR – MCU Control Register
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See ”Con-
figuring the Pin” on page 64 for more details about this feature.
15.4.2 PORTA – Port A Data Register
15.4.3 DDRA – Port A Data Direction Register
15.4.4 PINA – Port A Input Pins Address
15.4.5 PORTB – Port B Data Register
15.4.6 DDRB – Port B Data Direction Register
15.4.7 PINB – Port B Input Pins Address
Bit 7 6 5 4 3 2 1 0
0x35 (0x55)
– – CKOE PUD – – – – MCUCR
Read/Write R R R/W R/W R R R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
0x02 (0x22)
------PORTA1PORTA0
PORTA
Read/WriteRRRRRRR/WR/W
Initial Value00000000
Bit 76543210
0x01 (0x21)
------
DDA1 DDA0 DDRA
Read/WriteRRRRRR/R/WR/W
Initial Value00000000
Bit 76543210
0x00 (0x20)
------
PINA1 PINA0 PINA
Read/WriteRRRRRRR/WR/W
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A
Bit 76543210
0x05 (0x25)
----PORTB3PORTB2PORTB1PORTB0PORTB
Read/WriteRRRRR/WR/WR/WR/W
Initial Value00000000
Bit 76543210
0x04 (0x24)
-
- - - DDB3 DDB2 DDB1 DDB0 DDRB
Read/WriteRRRRR/WR/WR/WR/W
Initial Value00000000
Bit 76543210
0x03 (0x23)
-
- - - PINB3 PINB2 PINB1 PINB0 PINB
Read/WriteRRRRRRRR
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A