Datasheet
38
8024A–AVR–04/08
ATmega8HVA/16HVA
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
REG
/2 on an input pin can cause significant current even in active mode. Digital
input buffers can be disabled by writing to the Digital Input Disable Register. Refer to ”DIDR0 –
Digital Input Disable Register 0” on page 116 for details.
10.7.3 On-chip Debug System
A programmed DWEN Fuse enables some parts of the clock system to be running in all sleep
modes. This will increase the power consumption while in sleep. Thus, the DWEN Fuse should
be disabled when debugWire is not used.
10.7.4 Battery Protection
If one of the Battery Protection features is not needed by the application, this feature should be
disabled, see “BPCR – Battery Protection Control Register” on page 127. The current consump-
tion in the Battery Protection circuitry is only significant in Power-save mode. Disabling both
FETs will automatically disable the Battery Protection module in order to save power. The band-
gap reference should always be enabled whenever Battery Protection is enabled.
10.7.5 Voltage ADC
If enabled, the V-ADC will consume power independent of sleep mode. To save power, the V-
ADC should be disabled when not used, and before entering Power-save sleep mode. See
”Voltage ADC – 5-channel General Purpose 12-bit Sigma-Delta ADC” on page 112 for details on
V-ADC operation.
10.7.6 Coloumb Counter
If enabled, the CC-ADC will consume power independent of sleep mode and keep the Slow RC
oscillator running. To save power, the CC-ADC should be disabled when not used, or set in Reg-
ular Current detection mode. See ”Coulomb Counter - Dedicated Fuel Gauging Sigma-delta
ADC” on page 104 for details on CC-ADC operation.
10.7.7 Bandgap Voltage Reference
If enabled, the Bandgap reference will consume power independent of sleep mode. To save
power, the Bandgap reference should be disabled when not used as reference for the Voltage
ADC, the Coloumb Counter or Battery Protection. See ”Voltage Reference and Temperature
Sensor” on page 117 for details.
10.7.8 FET Driver
To minimize the power consumption in Power-save mode, the DUVR mode of the FET Driver
should be disabled to make sure that the Fast RC Oscillator is stopped.