Datasheet
36
8024A–AVR–04/08
ATmega8HVA/16HVA
Notes: 1. Discharge FET must be switched off for Charger Detect to be enabled.
2. RCOSC_FAST runs in Power-save mode if DUVR mode is enabled. It also runs for approximately 125 ms after C-FET/D-
FET has been enabled.
3. RCOSC_SLOW only runs if CC-ADC is enabled or when the oscillator is selected as input to the Oscillator sampling Inter-
face and sampling is enabled.
4. Instantaneous and Accumulate Conversion Complete wake-up only.
10.2 Idle Mode
When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle
mode, stopping the CPU but allowing all peripheral functions to continue operating. This sleep
mode basically halts clk
CPU
and clk
FLASH
, while allowing the other clocks to run. Idle mode
enables the MCU to wake up from external triggered interrupts as well as internal ones like the
Timer Overflow interrupt.
10.3 ADC Noise Reduction
When the SM2:0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC
Noise Reduction mode, stopping the CPU but allowing the Voltage ADC (V-ADC), Watchdog
Timer (WDT), Coulomb Counter (CC), Current Battery Protection (CBP), and the Ultra Low
Power RC Oscillator (RCOSC_ULP) to continue operating. This sleep mode basically halts
clk
I/O
, clk
CPU
, and clk
FLASH
, while allowing the other clocks to run.
This improves the noise environment for the Voltage ADC, enabling higher resolution
measurements.
10.4 Power-save Mode
When the SM2..0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-
save mode. In this mode, the internal Fast RC Oscillator (RCOSC_FAST) is stopped, while
Watchdog Timer (WDT), Coulomb Counter (CC), Current Battery Protection (CBP), the Ultra
Low Power RC Oscillator (RCOSC_ULP), and the Slow RC oscillator (RCOSC_SLOW) continue
operating.
This mode will be the default mode when application software does not require operation of
CPU, Flash or any of the peripheral units running at the Fast internal Oscillator (RCOSC_FAST).
If the current through the sense resistor is so small that the Coulomb Counter cannot measure it
accurately, Regular Current detection should be enabled to reduce power consumption. The
WDT keeps accurately track of the time so that battery self discharge can be calculated.
WDT XXXX
VREG X X X X
CHARGER_DETECT
(1)
XXXXX
VREGMON X X X
OSI X X
Table 10-2. Active modules in different Sleep Modes (Continued)
Module
Mode
Active Idle
ADC Noise
Reduction Power-save Power-off