Datasheet

177
8024A–AVR–04/08
ATmega8HVA/16HVA
(0x7D) Reserved – – – – – – – –
(0x7C) VADMUX – – – – VADMUX[3:0] 114
(0x7B) Reserved – – – – – – – –
(0x7A) VADCSR – – – – VADEN VADSC VADCCIF VADCCIE 114
(0x79) VADCH – – – – VADC Data Register High byte 115
(0x78) VADCL VADC Data Register Low byte 115
(0x77) Reserved – – – – – – – –
(0x76) Reserved – – – – – – – –
(0x75) Reserved – – – – – – – –
(0x74) Reserved – – – – – – – –
(0x73) Reserved – – – – – – – –
(0x72) Reserved – – – – – – – –
(0x71) Reserved – – – – – – – –
(0x70) Reserved – – – – – – – –
(0x6F) TIMSK1 – – – – ICIE1 OCIE1B OCIE1A TOIE1 92
(0x6E) TIMSK0 – – – – ICIE0 OCIE0B OCIE0A TOIE0 92
(0x6D) Reserved – – – – – – – –
(0x6C) Reserved
– – – – – – – –
(0x6B) Reserved
– – – – – – – –
(0x6A) Reserved – – – – – – – –
(0x69) EICRA – – ISC21 ISC20 ISC11 ISC10 ISC01 ISC00 56
(0x68) Reserved – – – – – – – –
(0x67) Reserved – – – – – – – –
(0x66) FOSCCAL Fast Oscillator Calibration Register 30
(0x65) Reserved – – – – – – – –
(0x64) PRR0 – – PRVRM – PRSPI PRTIM1 PRTIM0 PRVADC 39
(0x63) Reserved – – – – – – – –
(0x62) Reserved – – – – – – – –
(0x61) CLKPR CLKPCE – – – – – CLKPS1 CLKPS0 31
(0x60) WDTCSR WDIF WDIE WDP3 WDCE WDE WDP2 WDP1 WDP0 49
0x3F (0x5F) SREG I T H S V N Z C 9
0x3E (0x5E) SPH SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 12
0x3D (0x5D) SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 12
0x3C (0x5C) Reserved – – – – – – – –
0x3B (0x5B) Reserved – – – – – – – –
0x3A (0x5A) Reserved – – – – – – – –
0x39 (0x59) Reserved – – – – – – – –
0x38 (0x58) Reserved – – – – – – – –
0x37 (0x57) SPMCSR – – SIGRD CTPB RFLB PGWRT PGERS SPMEN 147
0x36 (0x56) Reserved – – – – – – – –
0x35 (0x55) MCUCR – –CKOEPUD – – – – 73/31
0x34 (0x54) MCUSR – – – OCDRF WDRF BODRF EXTRF PORF 49
0x33 (0x53) SMCR – – – – SM[2:0] SE 39
0x32 (0x52) Reserved – – – – – – – –
0x31 (0x51) DWDR debugWIRE Data Register 140
0x30 (0x50) Reserved – – – – – – – –
0x2F (0x4F) Reserved – – – – – – – –
0x2E (0x4E) SPDR SPI Data Register 103
0x2D (0x4D) SPSR SPIF WCOL – – – – –SPI2X 102
0x2C (0x4C) SPCR SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0 101
0x2B (0x4B) GPIOR2 General Purpose I/O Register 2 23
0x2A (0x4A) GPIOR1 General Purpose I/O Register 1 23
0x29 (0x49) OCR0B Timer/Counter0 Output Compare Register B 92
0x28 (0x48) OCR0A Timer/Counter0 Output Compare Register A 91
0x27 (0x47) TCNT0H Timer/Counter0 (8 Bit) High Byte 91
0x26 (0x46) TCNT0L Timer/Counter0 (8 Bit) Low Byte 91
0x25 (0x45) TCCR0B
– – – – – CS02 CS01 CS00 76
0x24 (0x44) TCCR0A TCW0 ICEN0 ICNC0 ICES0 ICS0
– –WGM00 90
0x23 (0x43) GTCCR TSM
– – – – – – PSRSYNC
0x22 (0x42) Reserved – – – – – – – –
0x21 (0x41) EEAR EEPROM Address Register Low Byte 19
0x20 (0x40) EEDR EEPROM Data Register 19
0x1F (0x3F) EECR – – EEPM1 EEPM0 EERIE EEMPE EEPE EERE 19
0x1E (0x3E) GPIOR0 General Purpose I/O Register 0 23
0x1D (0x3D) EIMSK
– – – – – INT2 INT1 INT0 57
0x1C (0x3C) EIFR
– – – – – INTF2 INTF1 INTF0 57
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page