Datasheet
170
8024A–AVR–04/08
ATmega8HVA/16HVA
29.5 FET Driver Characteristics
Notes: 1. All DC Characteristics contained in this data sheet are based on simulation and characterization of other AVR microcontrol-
lers manufactured in the same process technology. These values are preliminary values representing design targets, and
will be updated after characterization of actual silicon.
2. These numbers assume the use of one external N-channel FET of model TPCS8210. If other FETs are used, the numbers
may deviate somewhat. The equivalent capacitive loads at OC and OD are around 1.2 nF. Rise and fall times scale approxi-
mately proportional to the capacitive loading
3. Not tested in production.
29.6 Power-on and Reset Characteristics
Note: 1. The voltage at the Pack + terminal will be slightly higher than V
POT
when the chip is enabled. This is because of an internal
Pull-down current on the BATT pin in the range 50 - 110 uA and the R
BATT
resistor connected between the Pack + terminal
and the BATT pin. R
BATT
= 1k gives a voltage drop 0.05 - 0.11V.
Table 29-5. FET Driver Outputs specification
(1)
(T
A
= -10°C to 70°C unless otherwise specified)
Parameter Condition Min. Typ. Max. Units
VFET DC level
(2)
1 cell DUVR operation,
VREF = 1.100V
1.9 2.0 2.1 V
2 cell DUVR operation,
VREF = 1.100V
3.8 4.0 4.2 V
VFET ripple
(2)
1 cell DUVR operation ±0.1 V
2 cell DUVR operation ±0.1 V
OC, OD clamping
voltage
14.0 V
OC, OD Normal ON operation VFET + 2.5 VFET + 4 VFET + 6.5 V
OC, OD Normal OFF operation 0.0 0.1 V
Risetime
(2)(3)
(OC, OD, 0 - 90 %)
Normal ON operation 1 2 ms
Falltime
(2)(3)
(OC, OD, 100 - 10 %)
Normal OFF operation 5 10 µs
Table 29-6. Reset Characteristics(T
A
= -10°C to 70°C unless otherwise specified)
Symbol Parameter Condition Min Typ Max Units
V
POT
Power-on Threshold Voltage
(1)
VFET = 8.4V 2.75 3.65 4.1
V
VFET = 4.2V 2.75 3.5 3.95
t
RST
Minimum pulse width on RESET Pin 900 ns
V
BOT
Brown-Out Detection (BOD) Trigger
Level
2.9 V
V
HYST
BOD Level Hysteresis 100 mV
V
BLOT
Power-off Threshold Voltage 2.4 V