Datasheet

16
8024A–AVR–04/08
ATmega8HVA/16HVA
8. AVR Memories
8.1 Overview
This section describes the different memories in the ATmega8HVA/16HVA. The AVR architec-
ture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega8HVA/16HVA features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
8.2 In-System Reprogrammable Flash Program Memory
The ATmega8HVA/16HVA contains 8K/16K bytes On-chip In-System Reprogrammable Flash
memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is orga-
nized as 4K/8K x 16.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega8HVA/16HVA Program Counter (PC) is 12/13 bits wide, thus addressing the 4K/8K pro-
gram memory locations. ”Memory Programming” on page 149 contains a detailed description on
Flash data serial programming.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in ”Instruction Execution Tim-
ing” on page 13.
Figure 8-1. Program Memory Map
8.3 SRAM Data Memory
Figure 8-2 on page 17 shows how the ATmega8HVA/16HVA SRAM Memory is organized.
The ATmega8HVA/16HVA is a complex microcontroller with more peripheral units than can be
supported within the 64 locations reserved in the Opcode for the IN and OUT instructions. For
0x0000
0x0FFF/0x1FFF
Program Memory, organized as 4K/8K x 16 bits