Datasheet

130
8024A–AVR–04/08
ATmega8HVA/16HVA
applies when enabling the Discharge FET. For Charge Over-Current protection, this applies
when enabling the Charge FET. With nominal ULP frequency this delay is maximum 0.1 ms.
Note: Due to synchronization of parameters between clock domains, a guard time of 3 ULP oscillator
cycles + 3 CPU clock cycles is required between each time the BPOCTR register is written. Any
writing to the BPOCTR register during this period will be ignored.
23.9.5 BPHCTR – Battery Protection High-current Timing Register
Bit 7:6 – Res: Reserved Bits
These bits are reserved and will always read as zero.
Bit 5:0 – HCPT5:0: High-current Protection Timing
These bits control the delay of the High-circuit Protection. The High-current Timing can be set
with a step size of 2 ms as shown in Table 23-4 on page 130.
Notes: 1. The actual value depends on the actual frequency of the ”Ultra Low Power RC Oscillator” on
page 26. See ”Electrical Characteristics” on page 165.
2. Initial value.
3. An additional delay T
d
can be expected after enabling the corresponding FET. This is related to
the initialization of the protection circuitry. For the Discharge High-Current protection, this
applies when enabling the Discharge FET. For Charge High-Current protection, this applies
when enabling the Charge FET. With nominal ULP frequency this delay is maximum 0.2 ms.
Note: Due to synchronization of parameters between clock domains, a guard time of 3 ULP oscillator
cycles + 3 CPU clock cycles is required between each time the BPHCTR register is written. Any
writing to the BPHCTR register during this period will be ignored.
Bit 76543210
(0xFC) HCPT[5:0] BPHCTR
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 1
Table 23-4. High-current Protection Reaction Time. HCPT[5:0] with corresponding High-cur-
rent Delay Time.
High-current Protection Reaction Time
(1)
HCPT[5:0] Typ
0x00 (0 - 2 ms) + T
d
(3)
0x01
(2)
(0 - 2 ms) + T
d
(3)
0x02 (2 - 4 ms) + T
d
(3)
0x03 (4 - 6 ms) + T
d
(3)
... ...
0x3E (122 - 124 ms) + T
d
(3)
0x3F (124 - 126 ms) + T
d
(3)