Datasheet

109

8024A–AVR–04/08

ATmega8HVA/16HVA

19.7.2 CADCSRB - CC-ADC Control and Status Register B

• Bits 7 - Res: Reserved

This bit is reserved bit and will always read as zero.

• Bit 6 - CADACIE: CC-ADC Accumulate Current Interrupt Enable

When the CADACIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC

Accumulate Current Interrupt is enabled.

• Bit 5 - CADRCIE: CC-ADC Regular Current Interrupt Enable

When the CADRCIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC

Regular Current Interrupt is enabled.

• Bit 4 - CADICIE: CC-ADC Instantaneous Current Interrupt Enable

When the CADICIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC

Instantaneous Current Interrupt is enabled.

• Bits 3 - Res: Reserved

This bit is reserved bit and will always read as zero.

• Bit 2 - CADACIF: CC-ADC Accumulate Current Interrupt Flag

The CADACIF bit is set (one) after the Accumulate Current conversion has completed. The

CCADC Accumulate Current Interrupt is executed if the CADACIE bit and the I-bit in SREG are

set (one). CADACIF is cleared by hardware when executing the corresponding Interrupt Han-

dling Vector. Alternatively, CADACIF is cleared by writing a logic one to the flag.

• Bit 1 - CADRCIF: CC-ADC Regular Current Interrupt Flag

The CADRCIF bit is set (one) when the absolute value of the result of the last CC-ADC conver-

sion is greater than, or equal to, the compare values set by the CC-ADC Regular Current Level

• Bit 0 - CADICIF: CC-ADC Instantaneous Current Interrupt Flag

The CADICIF bit is set (one) when a CC-ADC Instantaneous Current conversion is completed.

The CC-ADC Instantaneous Current Interrupt is executed if the CADICIE bit and the I-bit in

SREG are set (one). CADICIF is cleared by hardware when executing the corresponding Inter-

rupt Handling vector. Alternatively, CADICIF is cleared by writing a logic one to the flag.

Bit 7 6 5 4 3 2 1 0

(0xE5)

– CADACIE CADRCIE CADICIE – CADACIF CADRCIF CADICIF CADCSRB

Read/Write R R/W R R/W R R/W R/W R/W

Initial Value 0 0 0 0 0 0 0 0