Datasheet

107
8024A–AVR–04/08
ATmega8HVA/16HVA
Instantaneous Current Interrupt should be enabled as wake-up source by setting the CADICIE
bit. The device will then wake-up from sleep after each single IC measurement. To check if Reg-
ular Current Detection has occurred the Regular Current Detection flag, CADRCIF, should be
read.
19.5 Offset Canceling by Polarity Switching
The CC-ADC offers Polarity Switching for internal offset canceling. By switching the polarity of
the sampled input signal at selected time intervals, the internal voltage offset of the CC-ADC will
cancel at the output. This feature prevents the CC-ADC from accumulating an offset error over
time.
19.6 Configuration and Usage
While the CC-ADC is converting, the CPU can enter sleep mode and wait for an interrupt. After
adding the conversion data for the Coulomb Counting, the CPU can go back to sleep again. This
reduces the CPU workload, and allows more time spent in low power modes, reducing power
consumption.
To use the CC-ADC, the bandgap voltage reference must be enabled. See ”Voltage Reference
and Temperature Sensor” on page 117.
The CC-ADC will not consume power when CADEN is cleared. It is therefore recommended to
switch off the CC-ADC whenever the Coulomb Counter or Regular Current Detection functions
are not used. The CC-ADC is automatically disabled in Power-off mode.
After the CC-ADC is enabled by setting the CADEN bit, the first three Instantaneous conversions
do not contain useful data and should be ignored. This also applies after clearing the CADSE bit,
or after changing the CADPOL or CADVSE bits.
The conversion times and sampling intervals are controlled by the Slow RC Oscillator, and will
depend on its actual frequency. To obtain accurate coulomb counting results, the actual conver-
sion time must be calculated. Refer to ”Slow RC Oscillator” on page 26 for details.
19.7 Register Description
19.7.1 CADCSRA - CC-ADC Control and Status Register A
• Bit 7 - CADEN: CC-ADC Enable
When the CADEN bit is cleared (zero), the CC-ADC is disabled, and any ongoing conversions
will be terminated. When the CADEN bit is set (one), the CC-ADC will continuously measure the
voltage drop over the external sense resistor R
SENSE
. In Power-off, the CC-ADC is always dis-
abled. Note that the bandgap voltage reference must be enabled, see ”Voltage Reference and
Temperature Sensor” on page 117.
• Bit 6 - CADPOL: CC-ADC Polarity
The CADPOL bit is used to change input sampling polarity in the Sigma Delta Modulator. Writing
this bit to one, the polarity will be negative. When the bit is zero, the polarity will be positive.
Bit 76543210
(0xE4)
CADEN CADPOL CADUB CADAS1 CADAS0 CADSI1 CADSI0 CADSE CADCSRA
Read/Write R/W R/W R R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0