Datasheet

138
8018P–AVR–08/10
ATmega169P
17. 8-bit Timer/Counter2 with PWM and Asynchronous Operation
Timer/Counter2 is a general purpose, single compare unit, 8-bit Timer/Counter module. The
main features are:
•
Single Compare Unit Counter
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Frequency Generator
• 10-bit Clock Prescaler
• Overflow and Compare Match Interrupt Sources (TOV2 and OCF2A)
• Allows Clocking from External 32 kHz Watch Crystal Independent of the I/O Clock
17.1 Overview
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 17-1. For the actual
placement of I/O pins, refer to Figure 1-1 on page 2. CPU accessible I/O Registers, including I/O
bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed
in the Section 17.10 ”8-bit Timer/Counter Register Description” on page 153.
Figure 17-1. 8-bit Timer/Counter Block Diagram
17.1.1 Registers
The Timer/Counter (TCNT2) and Output Compare Register (OCR2A) are 8-bit registers. Inter-
rupt request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register
Timer/Counter
DATA BUS
=
TCNTn
Waveform
Generation
OCnx
= 0
Control Logic
= 0xFF
TOPBOTTOM
count
clear
direction
TOVn
(Int.Req.)
OCnx
(Int.Req.)
Synchronization Unit
OCRnx
TCCRnx
ASSRn
Status flags
clk
I/O
clk
ASY
Synchronized Status flags
asynchronous mode
select (ASn)
TOSC1
T/C
Oscillator
TOSC2
Prescaler
clk
Tn
clk
I/O