Datasheet

155
2545T–AVR–05/11
ATmega48/88/168
Table 18-6 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
mode.
Note: 1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See “Phase correct PWM mode” on
page 148 for more details.
Table 18-7 shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to phase cor-
rect PWM mode.
Note: 1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See “Phase correct PWM mode” on
page 148 for more details.
• Bits 3, 2 – Res: Reserved bits
These bits are reserved bits in the Atmel ATmega48/88/168 and will always read as zero.
• Bits 1:0 – WGM21:0: Waveform generation mode
Combined with the WGM22 bit found in the TCCR2B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see Table 18-8 on page 156. Modes of operation supported by the
Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode,
and two types of Pulse Width Modulation (PWM) modes (see “Modes of operation” on page
145).
Table 18-6. Compare output mode, fast PWM mode
(1)
.
COM2B1 COM2B0 Description
0 0 Normal port operation, OC2B disconnected
01Reserved
10
Clear OC2B on compare match, set OC2B at BOTTOM,
(non-inverting mode)
11
Set OC2B on compare match, clear OC2B at BOTTOM,
(invertiing mode)
Table 18-7. Compare output mode, phase correct PWM mode
(1)
.
COM2B1 COM2B0 Description
0 0 Normal port operation, OC2B disconnected
01Reserved
10
Clear OC2B on compare match when up-counting
Set OC2B on compare match when down-counting
11
Set OC2B on compare match when up-counting
Clear OC2B on compare match when down-counting