Datasheet

14.11.2 Analog Comparator
When entering Idle mode, the analog comparator should be disabled if not used. When entering ADC
Noise Reduction mode, the analog comparator should be disabled. In other sleep modes, the analog
comparator is automatically disabled. However, if the analog comparator is set up to use the internal
voltage reference as input, the analog comparator should be disabled in all sleep modes. Otherwise, the
internal voltage reference will be enabled, independent of the sleep mode.
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27. Analog Comparator (AC)
14.11.3 Brown-Out Detector
If the Brown-Out Detector (BOD) is not needed by the application, this module should be turned off. If the
BOD is enabled by the BODLEVEL fuses, it will be enabled in all sleep modes, and hence, always
consume power. In the deeper sleep modes, this will contribute significantly to the total current
consumption.
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15. System Control and Reset
14.11.4 Internal Voltage Reference
The internal voltage reference will be enabled when needed by the Brown-out Detection, the analog
comparator or the Analog-to-Digital Converter (ADC). If these modules are disabled as described in the
sections above, the internal voltage reference will be disabled and it will not be consuming power. When
turned on again, the user must allow the reference to start-up before the output is used. If the reference is
kept on in Sleep mode, the output can be used immediately.
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15. System Control and Reset
14.11.5 Watchdog Timer
If the watchdog timer is not needed in the application, the module should be turned off. If the watchdog
timer is enabled, it will be enabled in all sleep modes and hence always consume power. In the deeper
sleep modes, this will contribute significantly to the total current consumption.
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15. System Control and Reset
14.11.6 Port Pins
When entering a sleep mode, all port pins should be configured to use minimum power. The most
important is then to ensure that no pins drive resistive loads. In sleep modes where both the I/O clock
(clk
I/O
) and the ADC clock (clk
ADC
) are stopped, the input buffers of the device will be disabled. This
ensures that no power is consumed by the input logic when not needed. In some cases, the input logic is
needed for detecting wake-up conditions, and it will then be enabled. Refer to the section Digital Input
Enable and Sleep Modes for details on which pins are enabled. If the input buffer is enabled and the input
signal is left floating or have an analog signal level close to V
CC
/2, the input buffer will use excessive
power.
For analog input pins, the digital input buffer should be disabled at all times. An analog signal level close
to V
CC
/2 on an input pin can cause significant current even in active mode. Digital input buffers can be
disabled by writing to the Digital Input Disable Registers (DIDR0 for ADC, DIDR1 for AC).
Related Links
ATmega48PA/88PA/168PA
Power Management and Sleep Modes
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 72