Datasheet

If timer/counter2 is not running, the Power-Down mode is recommended instead of the Power-Save

mode.

The timer/counter2 can be clocked both synchronously and asynchronously in Power-Save mode. If

timer/counter2 is not using the asynchronous clock, the timer/counter oscillator is stopped during sleep. If

timer/counter2 is not using the synchronous clock, the clock source is stopped during sleep. Even if the

synchronous clock is running in power-save, this clock is only available for timer/counter2.

14.8 Standby Mode

When the SM[2:0] bits are written to '110' and an external crystal/resonator clock option is selected, the

SLEEP instruction makes the MCU enter Standby mode. This mode is identical to the Power-Down mode

with the exception that the oscillator is kept running. From Standby mode, the device wakes up in six

clock cycles.

14.9 Extended Standby Mode

When the SM[2:0] bits are written to '111' and an external crystal/resonator clock option is selected, the

SLEEP instruction makes the MCU enter Extended Standby mode. This mode is identical to Power-Save

mode with the exception that the oscillator is kept running. From Extended Standby mode, the device

wakes up in six clock cycles.

14.10 Power Reduction Register

The Power Reduction Register (PRR) provides a method to stop the clock to individual peripherals to

reduce power consumption. The current state of the peripheral is frozen and the I/O registers cannot be

read or written. Resources used by the peripheral when stopping the clock will remain occupied, hence

the peripheral should in most cases be disabled before stopping the clock. Waking up a module, which is

done by clearing the corresponding bit in the PRR, puts the module in the same state as before

shutdown.

Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall power

consumption. In all other sleep modes, the clock is already stopped.

14.11 Minimizing Power Consumption

There are several possibilities to consider when trying to minimize the power consumption in an AVR

controlled system. In general, sleep modes should be used as much as possible, and the sleep mode

should be selected so that as few as possible of the device’s functions are operating. All functions not

needed should be disabled. In particular, the following modules may need special consideration when

trying to achieve the lowest possible power consumption.

14.11.1 Analog-to-Digital Converter

If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be disabled

before entering any sleep mode. When the ADC is turned off and on again, the next conversion will be an

extended conversion.