Datasheet

execution from the instruction following SLEEP. The contents of the register file and SRAM are unaltered
when the device wakes up from sleep. If a reset occurs during Sleep mode, the MCU wakes up and
executes from the Reset vector.
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13. System Clock and Clock Options
14.3 BOD Disable
When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses, the BOD is actively monitoring the
power supply voltage during a sleep period. To save power, it is possible to disable the BOD by use of
software for some of the sleep modes. The sleep mode power consumption will then be at the same level
as when BOD is globally disabled by fuses. If BOD is disabled in software, the BOD function is turned off
immediately after entering the sleep mode. Upon wake-up from sleep, BOD is automatically enabled
again. This ensures safe operation in case the V
CC
level has dropped during the sleep period.
When the BOD has been disabled, the wake-up time from sleep mode will be approximately 60 μs to
ensure that the BOD is working correctly before the MCU continues executing code.
BOD disable is controlled by the BOD Sleep bit in the MCU Control Register (MCUCR.BODS). Writing
this bit to '1' turns off the BOD in relevant sleep modes, while a zero in this bit keeps BOD active. The
default setting, BODS=0, keeps BOD active.
Note: Writing to the BODS bit is controlled by a timed sequence and an enable bit.
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14.12.2 MCUCR
14.4 Idle Mode
When the SM[2:0] bits are written to '000', the SLEEP instruction makes the MCU enter Idle mode,
stopping the CPU but allowing the SPI, USART, analog comparator, two-wire serial interface, timer/
counters, watchdog, and the interrupt system to continue operating. This Sleep mode basically halts
clk
CPU
and clk
FLASH
, while allowing the other clocks to run.
The Idle mode enables the MCU to wake-up from external triggered interrupts as well as internal ones
like the timer overflow and USART transmit complete interrupts. If wake-up from the analog comparator
interrupt is not required, the analog comparator can be powered-down by setting the ACD bit in the
Analog Comparator Control and Status Register – ACSR. This will reduce power consumption in Idle
mode.
14.5 ADC Noise Reduction Mode
When the SM[2:0] bits are written to '001', the SLEEP instruction makes the MCU enter ADC Noise
Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, the two-wire serial
interface address watch, Timer/Counter
(1)
, and the Watchdog to continue operating (if enabled). This
sleep mode basically halts clk
I/O
, clk
CPU
, and clk
FLASH
, while allowing the other clocks to run.
This improves the noise environment for the ADC, enabling higher resolution measurements. If the ADC
is enabled, a conversion starts automatically when this mode is entered. Apart from the ADC conversion
complete interrupt, only these events can wake-up the MCU from ADC Noise Reduction mode:
• External Reset
ATmega48PA/88PA/168PA
Power Management and Sleep Modes
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 69