Datasheet

Table 13-14. Start-Up Times for the 128kHz Internal Oscillator
Power Conditions Start-Up Time from Power-Down and Power-
Save
Additional Delay from Reset SUT[1:0]
BOD enabled 6 CK 14 CK 00
Fast rising power 6 CK 14 CK + 4 ms 01
Slowly rising power 6 CK 14 CK + 65 ms 10
Reserved 11
13.8 External Clock
To drive the device from an external clock source, EXTCLK should be driven as shown in the figure
below. To run the device on an external clock, the CKSEL fuses must be programmed to '0000':
Table 13-15. External Clock Frequency
Frequency
(1)
CKSEL[3:0]
0 - 20 MHz 0000
Note:
1. If the crystal frequency exceeds the specification of the device (depends on V
CC
), the CKDIV8 Fuse
can be programmed in order to divide the internal frequency by 8. It must be ensured that the
resulting divided clock meets the frequency specification of the device.
Figure 13-3. External Clock Drive Configuration
EXTERNAL
CLOCK
SIGNAL
EXTCLK
GND
When this clock source is selected, start-up times are determined by the SUT fuses:
Table 13-16. Start-Up Times for the External Clock Selection - SUT
Power Conditions Start-Up Time from Power-Down
and Power-Save
Additional Delay from Reset (V
CC
= 5.0V) SUT[1:0]
BOD enabled 6 CK 14 CK 00
Fast rising power 6 CK 14 CK + 4 ms 01
Slowly rising power 6 CK 14 CK + 65 ms 10
Reserved 11
ATmega48PA/88PA/168PA
System Clock and Clock Options
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 62