Datasheet

Frequency Range
[MHz]
CKSEL[3:1]
(2)
Absolute limits for total capacitance of C1 and C2 [pF]
(4)
3.0 - 8.0 110 12 - 22
8.0 - 16.0 111 12 - 22
Note:
1. This is the recommended CKSEL settings for the difference frequency ranges.
2. This option should not be used with crystals, only with ceramic resonators.
3. If the crystal frequency exceeds the specification of the device (depends on V
CC
), the CKDIV8 fuse
can be programmed in order to divide the internal frequency by 8. It must be ensured that the
resulting divided clock meets the frequency specification of the device.
4. When selecting the external capacitor value, the stray capacitance from the PCB and device should
be deducted.
The CKSEL0 Fuse together with the SUT[1:0] fuses select the start-up times, as shown in the following
table:
Table 13-4. Start-up Times for the Low-Power Crystal Oscillator Clock Selection
Oscillator Source / Power
Conditions
Start-up Time
from Power-down
and Power-save
Additional Delay from
Reset
(V
CC
= 5.0V)
CKSEL0 SUT[1:0]
Ceramic resonator, fast rising
power
258 CK 14 CK + 4.1 ms
(1)
0 00
Ceramic resonator, slowly
rising power
258 CK 14 CK + 65 ms
(1)
0 01
Ceramic resonator, BOD
enabled
1K CK 14 CK
(2)
0 10
Ceramic resonator, fast rising
power
1K CK 14 CK + 4.1 ms
(2)
0 11
Ceramic resonator, slowly
rising power
1K CK 14 CK + 65 ms
(2)
1 00
Crystal Oscillator, BOD
enabled
16K CK 14 CK 1 01
Crystal Oscillator, fast rising
power
16K CK 14 CK + 4.1 ms 1 10
Crystal Oscillator, slowly rising
power
16K CK 14 CK + 65 ms 1 11
Note:
1. These options should only be used when not operating close to the maximum frequency of the
device, and only if frequency stability at start-up is not important for the application. These options
are not suitable for crystals.
ATmega48PA/88PA/168PA
System Clock and Clock Options
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 57