Datasheet

13.2.1 Default Clock Source
The device is shipped with internal RC oscillator at 8.0 MHz and with the fuse CKDIV8 programmed,
resulting in 1.0 MHz system clock. The start-up time is set to maximum, and the time-out period is
enabled: CKSEL=0010, SUT=10, CKDIV8=0. This default setting ensures that all users can make their
desired clock source setting using any available programming interface.
13.2.2 Clock Start-Up Sequence
Any clock source needs a sufficient V
CC
to start oscillating and a minimum number of oscillating cycles
before it can be considered stable.
To ensure sufficient V
CC
, the device issues an internal Reset with a time-out delay (t
TOUT
) after the device
Reset is released by all other Reset sources. See the Related Links for a description of the start
conditions for the internal Reset. The delay (t
TOUT
) is timed from the Watchdog oscillator and the number
of cycles in the delay is set by the SUTx and CKSELx fuse bits. The selectable delays are shown in the
table below. The frequency of the Watchdog oscillator is voltage dependent.
Table 13-2. Number of Watchdog Oscillator Cycles
Typ. Time-out (V
CC
= 5.0V) Typ. Time-out (V
CC
= 3.0V)
0ms 0ms
4 ms 4.3 ms
65 ms 69 ms
Main purpose of the delay is to keep the device in Reset until it is supplied with minimum V
CC
. The delay
will not monitor the actual voltage, so it is required to select a delay longer than the V
CC
rise time. If this is
not possible, an internal or external Brown-out Detection (BOD) circuit should be used. A BOD circuit will
ensure sufficient V
CC
before it releases the reset, and the time out delay can be disabled. Disabling the
time-out delay without utilizing a BOD circuit is not recommended.
The oscillator is required to oscillate for a minimum number of cycles before the clock is considered
stable. An internal ripple counter monitors the oscillator output clock, and keeps the internal Reset active
for a given number of clock cycles. The Reset is then released and the device will start to execute. The
recommended oscillator start-up time is dependent on the clock type, and varies from six cycles for an
externally applied clock to 32K cycles for a low frequency crystal.
The start-up sequence for the clock includes both the time-out delay and the start-up time when the
device starts up from Reset. When starting up from Power-save or Power-down mode, V
CC
is assumed to
be at a sufficient level and only the start-up time is included.
13.2.3 Clock Source Connections
Pins XTAL1 and XTAL2 are input and output, respectively, of an inverting amplifier that can be configured
for use as an on-chip oscillator, as shown in the figure below. Either a quartz crystal or a ceramic
resonator may be used.
C1 and C2 should always be equal for both crystals and resonators. The optimal value of the capacitors
depends on the crystal or resonator in use, the amount of stray capacitance, and the electromagnetic
noise of the environment. Some initial guidelines for choosing capacitors for use with crystals are given in
the next table. For ceramic resonators, the capacitor values given by the manufacturer should be used.
ATmega48PA/88PA/168PA
System Clock and Clock Options
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 55