Datasheet

12.6.2 EEPROM Address Register Low and High Byte
Name: EEARL and EEARH
Offset: 0x41 [ID-000004d0]
Reset: 0xXX
Property: When addressing as I/O Register: address offset is 0x21
The EEARL and EEARH register pair represents the 16-bit value, EEAR. The low byte [7:0] (suffix L) is
accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For
more details on reading and writing 16-bit registers, refer to accessing 16-bit registers in the section
above.
When addressing I/O registers as data space using LD and ST instructions, the provided offset must be
used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an
I/O address offset within 0x00 - 0x3F.
Bit 15 14 13 12 11 10 9 8
EEAR[9:8]
Access
R/W R/W
Reset x x
Bit 7 6 5 4 3 2 1 0
EEAR[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset x x x x x x x x
Bits 9:0 – EEAR[9:0] EEPROM Address
The EEPROM Address Registers, EEARH and EEARL, specify the EEPROM address in the
256/512/512B EEPROM space. The EEPROM data bytes are addressed linearly between 0 and
255/511/511. The initial value of EEAR is undefined. A proper value must be written before the EEPROM
may be accessed.
ATmega48PA/88PA/168PA
AVR Memories
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 45