Datasheet
High Fuse Byte Bit No. Description Default Value
BODLEVEL1
(4)
1 Brown-out Detector trigger level 1 (unprogrammed)
BODLEVEL0
(4)
0 Brown-out Detector trigger level 1 (unprogrammed)
Note:
1. Refer to Alternate Functions of Port C in I/O-Ports chapter for description of RSTDISBL Fuse.
2. The SPIEN Fuse is not accessible in serial programming mode.
3. Refer to WDTCSR – Watchdog Timer Control Register for details.
4. Refer to table BODLEVEL Fuse Coding in System and Reset Characteristics for BODLEVEL Fuse
decoding.
Table 32-8. Fuse Low Byte
Low Fuse Byte Bit No. Description Default Value
CKDIV8
(4)
7 Divide clock by 8 0 (programmed)
CKOUT
(3)
6 Clock output 1 (unprogrammed)
SUT1 5 Select start-up time 1 (unprogrammed)
(1)
SUT0 4 Select start-up time 0 (programmed)
(1)
CKSEL3 3 Select Clock source 0 (programmed)
(2)
CKSEL2 2 Select Clock source 0 (programmed)
(2)
CKSEL1 1 Select Clock source 1 (unprogrammed)
(2)
CKSEL0 0 Select Clock source 0 (programmed)
(2)
Note:
1. The default value of SUT[1:0] results in maximum start-up time for the default clock source. See
table Start-Up Times for the Internal Calibrated RC Oscillator Clock Selection - SUT in Calibrated
Internal RC Oscillator of System Clock and Clock Options chapter for details.
2. The default setting of CKSEL[3:0] results in internal RC Oscillator @ 8 MHz. See table Internal
Calibrated RC Oscillator Operating Modes in Calibrated Internal RC Oscillator of the System Clock
and Clock Options chapter for details.
3. The CKOUT Fuse allows the system clock to be output on PORTB0. Refer to Clock Output Buffer
section in the System Clock and Clock Options chapter for details.
4. Refer to System Clock Prescaler section in the System Clock and Clock Options chapter for details.
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if Lock bit1
(LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Related Links
31.8.14 ATmega88PA Boot Loader Parameters
31.8.15 ATmega168PA Boot Loader Parameters
18.3.2 Alternate Functions of Port C
15.9.2 WDTCSR
13.6 Calibrated Internal RC Oscillator
13.10 Clock Output Buffer
ATmega48PA/88PA/168PA
Memory Programming (MEMPROG)
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 367