Datasheet

while a write operation is in progress, the write operation will be completed provided that the power
supply voltage is sufficient.
3. Keep the AVR core in Power-Down Sleep mode during periods of low V
CC
. This will prevent the
CPU from attempting to decode and execute instructions, effectively protecting the SPMCSR
register and thus the Flash from unintentional writes.
31.8.12 Programming Time for Flash when Using SPM
The calibrated RC Oscillator is used to time Flash accesses. The following table shows the typical
programming time for Flash accesses from the CPU.
Table 31-5. SPM Programming Time
Symbol Min. Programming
Time
Max. Programming
Time
Flash write (Page Erase, Page Write, and write Lock
bits by SPM)
3.2 ms 3.4 ms
Note: Minimum and maximum programming time is per individual operation.
31.8.13 Simple Assembly Code Example for a Boot Loader
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z-pointer
;-error handling is not included
;-the routine must be placed inside the Boot space
; (at least the Do_spm sub routine). Only code inside NRWW section can
; be read during Self-Programming (Page Erase and Page Write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the Boot
; loader section or that the interrupts are disabled.
.equ PAGESIZEB = PAGESIZE*2 ;PAGESIZEB is page size in BYTES, not words
.org SMALLBOOTSTART
Write_page:
; Page Erase
ldi spmcrval, (1<<PGERS) | (1<<SPMEN)
call Do_spm
; re-enable the RWW section
.
; must be avoided if the page buffer is pre-filled. Will flush the page
buffer.
ATmega48PA/88PA/168PA
Boot Loader Support – Read-While-Write Self-...
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Datasheet Complete
DS40002011A-page 356