Datasheet
The first ADC conversion result after switching reference voltage source may be inaccurate, and the user
is advised to discard this result.
28.6 ADC Noise Canceler
The ADC features a noise canceler that enables conversion during Sleep mode to reduce noise induced
from the CPU core and other I/O peripherals. The noise canceler can be used with ADC Noise Reduction
and Idle mode. To make use of this feature, the following procedure should be used:
1. Make sure that the ADC is enabled and is not busy converting. Single Conversion mode must be
selected and the ADC conversion complete interrupt must be enabled.
2. Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion once the CPU
has been halted.
3. If no other interrupts occur before the ADC conversion completes, the ADC interrupt will wake up
the CPU and execute the ADC conversion complete interrupt routine. If another interrupt wakes up
the CPU before the ADC conversion is complete, that interrupt will be executed, and an ADC
conversion complete interrupt request will be generated when the ADC conversion completes. The
CPU will remain in Active mode until a new sleep command is executed.
Note: The ADC will not be automatically turned off when entering other Sleep modes than Idle mode
and ADC Noise Reduction mode. The user is advised to write zero to ADCRSA.ADEN before entering
such Sleep modes to avoid excessive power consumption.
28.6.1 Analog Input Circuitry
The analog input circuitry for single ended channels is illustrated below. An analog source applied to
ADCn is subjected to the pin capacitance and input leakage of that pin, regardless of whether that
channel is selected as input for the ADC. When the channel is selected, the source must drive the S/H
capacitor through the series resistance (combined resistance in the input path).
The ADC is optimized for analog signals with an output impedance of approximately 10 kΩ or less. If such
a source is used, the sampling time will be negligible. If a source with higher impedance is used, the
sampling time will depend on how long of a time the source needs to charge the S/H capacitor, which can
vary widely. It is recommended to use only low impedance sources with slowly varying signals since this
minimizes the required charge transfer to the S/H capacitor.
Signal components higher than the Nyquist frequency (f
ADC
/2) should not be present for either kind of
channels to avoid distortion from unpredictable signal convolution. The user is advised to remove high
frequency components with a low-pass filter before applying the signals as inputs to the ADC.
Figure 28-8. Analog Input Circuitry
ADCn
I
IH
1..100 kΩ
C
S/H
= 14pF
I
IL
V
CC
/2
ATmega48PA/88PA/168PA
Analog-to-Digital Converter (ADC)
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 321