Datasheet

26.9.3 TWI (Slave) Address Register

Name: TWAR

Offset: 0xBA

Reset: 0xFE

Property: -

The TWAR should be loaded with the 7-bit slave address (in the seven most significant bits of TWAR) to

which the TWI will respond when programmed as a slave transmitter or receiver, and not needed in the

Master modes. In multi master systems, TWAR must be set in masters which can be addressed as slaves

by other masters.

The LSB of TWAR is used to enable recognition of the general call address (0x00). There is an

associated address comparator that looks for the slave address (or general call address if enabled) in the

received serial address. If a match is found, an interrupt request is generated.

Bit 7 6 5 4 3 2 1 0

TWA[6:0] TWGCE

Access

R/W R/W R/W R/W R/W R/W R/W R/W

Reset 1 1 1 1 1 1 1 0

Bits 7:1 – TWA[6:0] TWI (Slave) Address

These seven bits constitute the slave address of the TWI unit.

Bit 0 – TWGCE TWI General Call Recognition Enable Bit

If set, this bit enables the recognition of a general call given over the 2-wire serial bus.

ATmega48PA/88PA/168PA

Two-Wire Serial Interface (TWI)

Datasheet Complete

DS40002011A-page 304