Datasheet

26. Two-Wire Serial Interface (TWI)

26.1 Features

• Simple, yet Powerful and Flexible Communication Interface, only two Bus Lines Needed

• Both Master and Slave Operation Supported

• Device can Operate as Transmitter or Receiver

• 7-bit Address Space Allows up to 128 Different Slave Addresses

• Multi-master Arbitration Support

• Up to 400 kHz Data Transfer Speed

• Slew-rate Limited Output Drivers

• Noise Suppression Circuitry Rejects Spikes on Bus Lines

• Fully Programmable Slave Address with General Call Support

• Address Recognition Causes Wake-up When AVR is in Sleep Mode

• Compatible with Philips’ I

C protocol

26.2 Two-Wire Serial Interface Bus Definition

The Two-Wire Serial Interface (TWI) is ideally suited for typical microcontroller applications. The TWI

protocol allows the systems designer to interconnect up to 128 different devices using only two bi-

directional bus lines: one for clock (SCL) and one for data (SDA). The only external hardware needed to

implement the bus is a single pull-up resistor for each of the TWI bus lines. All devices connected to the

bus have individual addresses, and mechanisms for resolving bus contention are inherent in the TWI

protocol.

Figure 26-1. TWI Bus Interconnection

SDA

SCL

........

R1 R2

Device 1 Device 2

Device 3

Device n

26.2.1 TWI Terminology

The following definitions are frequently encountered in this section.

ATmega48PA/88PA/168PA

Two-Wire Serial Interface (TWI)

Datasheet Complete

DS40002011A-page 271