Datasheet

24.10 Multi-Processor Communication Mode
Setting the Multi-Processor Communication mode (MPCMn) bit in UCSRnA enables a filtering function of
incoming frames received by the USART receiver. Frames that do not contain address information will be
ignored and not put into the receive buffer. This effectively reduces the number of incoming frames that
have to be handled by the CPU, in a system with multiple MCUs that communicate via the same serial
bus. The transmitter is unaffected by the MPCMn setting but has to be used differently when it is a part of
a system utilizing the Multi-processor Communication mode.
If the receiver is set up to receive frames that contain five to eight data bits, then the first stop bit indicates
if the frame contains data or address information. If the receiver is set up for frames with 9 data bits, then
the ninth bit (RXB8) is used for identifying address and data frames. When the frame type bit (the first
stop or the ninth bit) is '1', the frame contains an address. When the frame type bit is '0', the frame is a
data frame.
The Multi-Processor Communication mode enables several slave MCUs to receive data from a master
MCU. This is done by first decoding an address frame to find out which MCU has been addressed. If a
particular slave MCU has been addressed, it will receive the following data frames as normal, while the
other slave MCUs will ignore the received frames until another address frame is received.
24.10.1 Using MPCMn
For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZ1=7). The ninth bit
(TXB8) must be set when an address frame (TXB8=1) is being transmitted or cleared when a data frame
(TXB=0) is being transmitted. The slave MCUs must, in this case, be set to use a 9-bit character frame
format.
The following procedure should be used to exchange data in Multi-Processor Communication mode:
1. All slave MCUs are in Multi-Processor Communication mode (MPCM in UCSRnA is set).
2. The master MCU sends an address frame, and all slaves receive and read this frame. In the slave
MCUs, the RXC flag in UCSRnA will be set as normal.
3. Each slave MCU reads the UDRn register and determines if it has been selected. If so, it clears the
MPCM bit in UCSRnA, otherwise, it waits for the next address byte and keeps the MPCM setting.
4. The addressed MCU will receive all data frames until a new address frame is received. The other
slave MCUs, which still have the MPCM bit set, will ignore the data frames.
5. When the last data frame is received by the addressed MCU, the addressed MCU sets the MPCM
bit and waits for a new address frame from the master. The process then repeats from step 2.
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the receiver must
change between using n and n+1 character frame formats. This makes full-duplex operation difficult since
the transmitter and receiver use the same character size setting. If 5- to 8-bit character frames are used,
the transmitter must be set to use two stop bit (USBS = 1) since the first stop bit is used for indicating the
frame type.
Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCM bit. The MPCM bit
shares the same I/O location as the TXC flag and this might accidentally be cleared when using SBI or
CBI instructions.
24.11 Examples of Baud Rate Setting
For standard crystal and resonator frequencies, the most commonly used baud rates for asynchronous
operation can be generated by using the UBRRn settings as listed in the table below.
ATmega48PA/88PA/168PA
Universal Synchronous Asynchronous Receiver ...
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Datasheet Complete
DS40002011A-page 252