Datasheet

22.11.7 TC2 Interrupt Flag Register
Name:  TIFR2
Offset:  0x37
Reset:  0x00
Property:  When addressing as I/O Register: address offset is 0x17
When addressing I/O registers as data space using LD and ST instructions, the provided offset must be
used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an
I/O address offset within 0x00 - 0x3F.
Bit 7 6 5 4 3 2 1 0
OCF2B OCF2A TOV2
Access
R/W R/W R/W
Reset 0 0 0
Bit 2 – OCF2B Timer/Counter 2, Output Compare B Match Flag
The OCF2B bit is set (one) when a compare match occurs between the timer/counter2 and the data in
Output Compare Register2 (OCR2B). OCF2B is cleared by hardware when executing the corresponding
interrupt handling vector. Alternatively, OCF2B is cleared by writing a logic one to the flag. When the I-bit
in SREG, OCIE2B (timer/counter2 compare match interrupt enable), and OCF2B are set (one), the timer/
counter2 compare match interrupt is executed.
Bit 1 – OCF2A Timer/Counter 2, Output Compare A Match Flag
The OCF2A bit is set (one) when a compare match occurs between the timer/counter2 and the data in
Output Compare Register2 (OCRA). OCF2A is cleared by hardware when executing the corresponding
interrupt handling vector. Alternatively, OCF2A is cleared by writing a logic one to the flag. When the I-bit
in SREG, OCIE2A (timer/counter2 compare match interrupt enable), and OCF2A are set (one), the timer/
counter 2 compare match interrupt is executed.
Bit 0 – TOV2 Timer/Counter 2, Overflow Flag
The TOV2 bit is set (one) when an overflow occurs in Timer/Counter 2. TOV2 is cleared by hardware
when executing the corresponding interrupt handling vector. Alternatively, TOV2 is cleared by writing a
logic one to the flag. When the SREG I-bit, TOIE2A (timer/counter 2 overflow interrupt enable), and TOV2
are set (one), the timer/counter 2 overflow interrupt is executed. In PWM mode, this bit is set when timer/
counter 2 changes counting direction at 0x00.
ATmega48PA/88PA/168PA
8-bit Timer/Counter2 (TC2) with PWM and A...
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 223