Datasheet
6. I/O Multiplexing
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be
assigned to one of the peripheral functions.
The following table describes the peripheral signals multiplexed to the PORT I/O pins.
Table 6-1. PORT Function Multiplexing
(32-pin
32UFBGA)
Pin#
(32-pin
MLF/
TQFP)
Pin#
(28-pin
MLF)
Pin#
(28-pin
PIPD)
Pin#
PAD EXTINT PCINT ADC/A
C
OSC T/C #0 T/C
#1
USART
0
I
2
C 0 SPI 0
B1 1 1 5 PD3 INT1 PCINT19 OC2B
B2 2 2 6 PD4 PCINT20 T0 XCK0
D1 4 3 7 VCC
C1 3 4 8 GND
D2 6 - - VCC
C2 5 - - GND
E1 7 5 9 PB6 PCINT6 XTAL1/
TOSC1
F1 8 6 10 PB7 PCINT7 XTAL2/
TOSC2
F2 9 7 11 PD5 PCINT21 OC0B T1
E2 10 8 12 PD6 PCINT22 AIN0 OC0A
F3 11 9 13 PD7 PCINT23 AIN1
E3 12 10 14 PB0 PCINT0 CLKO ICP1
F4 13 11 15 PB1 PCINT1 OC1A
E4 14 12 16 PB2 PCINT2 OC1B SS0
F5 15 13 17 PB3 PCINT3 OC2A MOSI0
F6 16 14 18 PB4 PCINT4 MISO0
E6 17 15 19 PB5 PCINT5 SCK0
E5 18 16 20 AVCC
D6 19 - - ADC6 ADC6
D5 20 17 21 AREF
C6 21 18 22 GND
C5 22 - - ADC7 ADC7
B6 23 19 13 PC0 PCINT8 ADC0
A6 24 20 24 PC1 PCINT9 ADC1
A2 25 21 25 PC2 PCINT10 ADC2
B5 26 22 26 PC3 PCINT11 ADC3
A4 27 23 27 PC4 PCINT12 ADC4 SDA0
B4 28 24 28 PC5 PCINT13 ADC5 SCL0
ATmega48PA/88PA/168PA
I/O Multiplexing
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 22