Datasheet

19.9.7 TC0 Output Compare Register B
Name: OCR0B
Offset: 0x48
Reset: 0x00
Property: When addressing as I/O register: address offset is 0x28
When addressing I/O registers as data space using LD and ST instructions, the provided offset must be
used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an
I/O address offset within 0x00 - 0x3F.
Bit 7 6 5 4 3 2 1 0
OCR0B[7:0]
Access
R/W R/W R/W R/W R/W R/W R/W R/W
Reset 0 0 0 0 0 0 0 0
Bits 7:0 – OCR0B[7:0] Output Compare 0 B
The output compare register B contains an 8-bit value that is continuously compared with the counter
value (TCNT0). A match can be used to generate an output compare interrupt or to generate a waveform
output on the OC0B pin.
ATmega48PA/88PA/168PA
8-bit Timer/Counter0 (TC0) with PWM
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 159