Datasheet

Figure 19-4. Compare Match Output Unit, Schematic
PORT
DDR
D Q
D Q
OCnx
Pin
OCnx
D Q
Waveform
Generator
COMnx[1]
COMnx[0]
0
1
DATA BUS
FOCnx
clk
I/O
Note: The “n” in the register and bit names indicates the device number (n = 0 for Timer/Counter 0), and
the “x” indicates output compare unit (A/B).
The general I/O port function is overridden by the Output Compare (OC0x) from the waveform generator
if either of the COM0x[1:0] bits are set. However, the OC0x pin direction (input or output) is still controlled
by the Data Direction Register (DDR) for the port pin. In the DDR, the bit for the OC1x pin (DDR.OC0x)
must be set as output before the OC0x value is visible on the pin. The port override function is
independent of the Waveform Generation mode.
The design of the output compare pin logic allows initialization of the OC0x register state before the
output is enabled. Some TCCR0A.COM0x[1:0] bit settings are reserved for certain modes of operation.
The TCCR0A.COM0x[1:0] bits have no effect on the input capture unit.
Related Links
19.9 Register Description
19.6.1 Compare Output Mode and Waveform Generation
The waveform generator uses the TCCR0A.COM0x[1:0] bits differently in Normal, CTC, and PWM
modes. For all modes, setting the TCCR0A.COM0x[1:0]=0x0 tells the waveform generator that no action
on the OC0x register is to be performed on the next compare match. Refer to the descriptions of the
output modes.
A change of the TCCR0A.COM0x[1:0] bits state will have effect at the first compare match after the bits
are written. For non-PWM modes, the action can be forced to have immediate effect by using the
TCCR0C.FOC0x strobe bits.
ATmega48PA/88PA/168PA
8-bit Timer/Counter0 (TC0) with PWM
© 2018 Microchip Technology Inc.
Datasheet Complete
DS40002011A-page 142