Datasheet

1. Description

The AVR

core combines a rich instruction set with 32 general purpose working registers. All the 32

registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to

be accessed in a single instruction executed in one clock cycle. The resulting architecture is more code

efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.

The ATmega48PA/88PA/168PA provides the following features: 4K/8K/16Kbytes of in-system

programmable Flash with read-while-write capabilities, 256/512/512bytes EEPROM, 512/1K/1Kbytes

SRAM, 23 general purpose I/O lines, 32 general purpose working registers, Real Time Counter (RTC),

three flexible timer/counters with Compare modes and PWM, 1 serial programmable USARTs , 1 byte-

oriented 2-wire Serial Interface (I

C), a 6-channel 10-bit ADC (8 channels in TQFP and QFN/MLF

packages), a programmable watchdog timer with internal oscillator, an SPI serial port, and six software

selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, timer/counters,

SPI port, and interrupt system to continue functioning. The Power-Down mode saves the register

contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware

Reset. In Power-Save mode, the asynchronous timer continues to run, allowing the user to maintain a

timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and

all I/O modules except asynchronous timer and ADC to minimize switching noise during ADC

conversions. In Standby mode, the crystal/resonator oscillator is running while the rest of the device is

sleeping. This allows very fast start-up combined with low-power consumption. In Extended Standby

mode, both the main oscillator and the asynchronous timer continue to run.

Microchip offers the QTouch

library for embedding capacitive touch buttons, sliders and wheels

functionality into AVR microcontrollers. The patented charge-transfer signal acquisition offers robust

sensing and includes fully debounced reporting of touch keys and includes Adjacent Key Suppression

™

(AKS

™

) technology for unambiguous detection of key events. The easy-to-use QTouch Suite toolchain

allows you to explore, develop and debug your own touch applications.

The device is manufactured using Microchip’s high density nonvolatile memory technology. The on-chip

ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial interface, by

a conventional nonvolatile memory programmer, or by an on-chip boot program running on the AVR core.

The boot program can use any interface to download the application program in the application Flash

memory. Software in the boot Flash section will continue to run while the application Flash section is

updated, providing true read-while-write operation. By combining an 8-bit RISC CPU with in-system self-

programmable Flash on a monolithic chip, the ATmega48PA/88PA/168PA is a powerful microcontroller

that provides a highly flexible and cost effective solution to many embedded control applications.

The ATmega48PA/88PA/168PA is supported with a full suite of program and system development tools

including: C compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and

evaluation kits.

ATmega48PA/88PA/168PA

Description

Datasheet Complete

DS40002011A-page 10